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74F20 - Dual 4-Input NAND Gate

General Description

This device contains two independent gates, each of which performs the logic NAND function.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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74F20 Dual 4-Input NAND Gate April 1988 Revised July 1999 74F20 Dual 4-Input NAND Gate General Description This device contains two independent gates, each of which performs the logic NAND function. Ordering Code: Order Number 74F20SC 74F20SJ 74F20PC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Unit Loading/Fan Out U.L. Pin Names An, Bn, Cn, Dn On Description HIGH/LOW Inputs Outputs 1.0/1.0 50/33.