MM74C48 Datasheet | Fairchild Semiconductor

MM74C48 BCD-to-7 Segment Decoder October 1987 Revised January 1999 MM74C48 BCD-to-7 Segment Decoder General Description The MM74C48 BCD-to-7 segment decoder is a monolithic plementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. Seven NAND gates and one driver are connected in pairs to make binary-coded decimal (BCD) data and its plement available to the seven decoding AND-OR-INVERT gates. The remaining NAND gate and three input buffers provide test-blanking input/ripple-blanking output, and ripple-blanking inputs. Features s Wide supply voltage range: s Guaranteed noise margin: s High noise immunity: fan out of 2 driving 74L s High...