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MM74C48 - BCD-to-7 Segment Decoder

Description

The MM74C48 BCD-to-7 segment decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors.

Features

  • s Wide supply voltage range: s Guaranteed noise margin: s High noise immunity: fan out of 2 driving 74L s High current sourcing output (up to 50 mA) s Ripple blanking for leading or trailing zeros (optional) s Lamp test provision 3.0V to 15V 1.0V 0.45 VCC (typ. ) s Low power TTL compatibility: Ordering Code: Order Number MM74C48N Package Number N16E Package.

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Full PDF Text Transcription

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MM74C48 BCD-to-7 Segment Decoder October 1987 Revised January 1999 MM74C48 BCD-to-7 Segment Decoder General Description The MM74C48 BCD-to-7 segment decoder is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. Seven NAND gates and one driver are connected in pairs to make binary-coded decimal (BCD) data and its complement available to the seven decoding AND-OR-INVERT gates. The remaining NAND gate and three input buffers provide test-blanking input/ripple-blanking output, and ripple-blanking inputs.
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