MM74C48 Datasheet | National Semiconductor

MM54C48 MM74C48 BCD-to-7 Segment Decoder March 1988 MM54C48 MM74C48 BCD-to-7 Segment Decoder General Description The MM54C48 MM74C48 BCD-to-7 segment decoder is a monolithic plementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors Seven NAND gates and one driver are connected in pairs to make binary-coded decimal (BCD) data and its plement available to the seven decoding AND-OR-INVERT gates The remaining NAND gate and three input buffers provide test-blanking input ripple-blanking output and ripple-blanking inputs Features Y Wide supply voltage range 3 0V to 15V Y Guaranteed noise margin 1 0V Y High noise immunity Y Low power 0 45...