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MM74HCT273 - Octal D-Type Flip-Flop

General Description

The MM74HCT273 utilizes advanced silicon-gate CMOS technology.

It has an input threshold and output drive similar to LS-TTL with the low standby power of CMOS.

These positive edge-triggered flip-flops have a common clock and clear-independent Q outputs.

Key Features

  • s Typical propagation delay: 20 ns s Low quiescent current: 80 PA maximum (74HCT series) s Fanout of 10 LS-TTL loads Ordering Code: Order Number Package Number Package.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MM74HCT273 Octal D-Type Flip-Flop with Clear February 1984 Revised May 2005 MM74HCT273 Octal D-Type Flip-Flop with Clear General Description The MM74HCT273 utilizes advanced silicon-gate CMOS technology. It has an input threshold and output drive similar to LS-TTL with the low standby power of CMOS. These positive edge-triggered flip-flops have a common clock and clear-independent Q outputs. Data on a D input, having the specified set-up and hold time, is transferred to the corresponding Q output on the positive-going transition of the clock pulse. The asynchronous clear forces all outputs LOW when it is LOW. All inputs to this device are protected from damage due to electrostatic discharge by diodes to VCC and ground.