MC100ES6039 Description
Pin CLK(1), CLK(1) EN(1) MR(1) .. Function ECL Diff Clock Inputs ECL Sync Enable ECL Master Reset ECL Reference Output ECL Diff ÷2/4 Outputs ECL Diff ÷4/6 Outputs ECL Freq. Select Input ÷2/4 ECL Freq.
| Part number | MC100ES6039 |
|---|---|
| Download | MC100ES6039 Datasheet (PDF) |
| File Size | 260.61 KB |
| Manufacturer | Freescale Semiconductor |
| Description | 3.3V ECL/PECL/HSTL/LVDS Generation Chip |
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| Part Number | Description |
|---|---|
| MC100ES6014 | 2.5 V/3.3 V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver |
| MC100ES6017 | 3.3V ECL/PECL Quad Differential Receiver |
| MC100ES6056 | 2.5 V/3.3 V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer |
| MC100ES60T22 | 3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Translator |
| MC100ES6139 | Clock Generation Chip |
Pin CLK(1), CLK(1) EN(1) MR(1) .. Function ECL Diff Clock Inputs ECL Sync Enable ECL Master Reset ECL Reference Output ECL Diff ÷2/4 Outputs ECL Diff ÷4/6 Outputs ECL Freq. Select Input ÷2/4 ECL Freq.