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MC33912 - LIN transceiver

Key Features

  • The device provides full SPI readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN Protocol Specification 2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry which can be disabled for higher data rates. Two 50 mA/60 mA high-side switches and two 150 mA/160 mA low-side switches with output protection are available. All outputs can be pulse-width modulated (PWM). Four high voltage inputs are available for use in contact monitoring, or as externa.

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NXP Semiconductors Technical Data LIN system basis chip with dc motor pre-driver and current sense Document Number: MC33912 Rev. 10.0, 8/2016 33912 The 33912G5/BAC is a Serial Peripheral Interface (SPI) controlled System Basis Chip (SBC), combining many frequently used functions in an MCU based system, plus a Local Interconnect Network (LIN) transceiver. The 33912 has a 5.0 V, 50 mA/60 mA low dropout regulator with full protection and reporting features. The device provides full SPI readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN Protocol Specification 2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry which can be disabled for higher data rates.