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MPC859 - Hardware Specifications

Key Features

  • hitecture) with thirty-two 32-bit general-purpose registers (GPRs).
  • The core performs branch prediction with conditional prefetch, without conditional execution.
  • 4- or 8-Kbyte data cache and 4- or 16-Kbyte instruction cache (see Table 1).
  • 16-Kbyte instruction cache (MPC866P and MPC859P) is four-way, set-associative with 256 sets; 4-Kbyte instruction cache (MPC866T, MPC859T, and MPC859DSL) is two-way, set-associative with 128 sets.
  • 8-Kbyte data cache (MPC866P.

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📁 Similar Datasheet

Part Number Description Manufacturer
MPC859D Technical Summary Motorola
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MPC859TTS Technical Summary Motorola

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Freescale Semiconductor, Inc. Advance Information MPC866EC/D Rev. 1.4, 8/2003 MPC866/859 Hardware Specifications Freescale Semiconductor, Inc... This document contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing speciļ¬cations for the MPC866/859 family (refer to Table 1 for a list of devices). The MPC866P is the superset device of the MPC866/859 family. This document describes pertinent electrical and physical characteristics of the MPC8245. For functional characteristics of the processor, refer to the MPC866 PowerQUICC Family Users Manual (MPC866UM/D).