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MPC859D - Technical Summary

Download the MPC859D datasheet PDF. This datasheet also covers the MPC859TTS variant, as both devices belong to the same technical summary family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • m frequency operation of the external bus is 66 MHz.
  • The 133MHz/100MHz core frequencies support 2:1 mode only.
  • The 50MHz/66MHz core frequencies support both 1:1 and 2:1 modes Single-issue, 32-bit core (compatible with the PowerPC architecture definition) with 32, 32-bit general-purpose registers (GPRs).
  • The core performs branch prediction with conditional prefetch, without conditional execution.
  • 4- or 8-Kbyte data cache and 4- or 16-Kbyte instruction cache (see.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MPC859TTS_Motorola.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com Freescale Semiconductor, Inc. Advance Information MPC859TTS/D Rev. 1.2, 4/2003 MPC859P/859T/859DSL PowerQUICC™ Family Technical Summary Freescale Semiconductor, Inc... This document provides an overview of the MPC859P/859T/859DSL PowerQUICC™ Family, describing major functions and features. The MPC859P/859T/859DSL PowerQUICC Family contains a PowerPC™ processor core. The topics covered include: Section Section 1.1, “Features” Section 1.2, “Embedded MPC8xx Core” Section 1.3, “System Interface Unit (SIU)” Section 1.4, “PCMCIA Controller” Section 1.5, “Power Management” Section 1.6, “Communications Processor Module (CPM)” Section 1.7, “ATM Capabilities” Section 1.8, “Differences between MPC859P/859T and MPC859DSL” Section 1.