PC33926 Datasheet | Freescale Semiconductor

feature provides a proportional (0.24% of the load current) current output suitable for monitoring by a microcontroller’s A/D input. A Status Flag output reports undervoltage, overcurrent, and overtemperature fault conditions. Two independent inputs provide polarity control of two half-bridge totem-pole outputs. Two independent disable inputs are provided to force the H-Bridge outputs to tri-state (high impedance off-state). An input invert input changes the IN1 and IN2 inputs to LOW = true logic. Features AUTOMOTIVE THROTTLE H-BRIDGE ACTUATOR/ MOTOR EXCITER Bottom SCALE View 2:1 PNB SUFFIX 98ARL10579D 32-PIN PQFN - 8.0 V to 28 V Continuous Operation (Transient Operation from 5.0 V to 36 V) - 225 mΩ maximum RDS(ON) @ 150°C (each H-Bridge MOSFET) ORDERING INFORMATION - 3.0 V and 5.0 V TTL / CMOS Logic patible Inputs Temperature Device Package - Overcurrent Limiting (Regulation) via Internal Constant-Off Range (TA) Time PWM PC33926PNB/R2 - 40°C to 125°C 32 PQFN - Output Short Circuit Protection (Short to VPWR or Ground) - Temperature-Dependant Current-Limit Threshold Reduction - All Inputs have an Internal Source/Sink to Define the Default (Floating Input) States - Sleep Mode with Current Draw < 50 µA (with Inputs Floating or Set to Match Default Logic States) VDD VPWR SF FB IN1 IN2 VPWR CCP OUT1 INV SLEW D1 D2 EN PGND AGND OUT2 MOTOR Figure 1. 33926 Simplified Application Diagram - This document contains certain information on a product under development. Freescale reserves the right to change or discontinue this product without notice © Freescale Semiconductor, Inc., 2007. All rights reserved. INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM VPWR LOGIC SUPPLY VCP CHARGE PUMP TO GATES HS1 HS2 OUT1 OUT2 EN IN1 IN2 D2 D1 INV SLEW SF FB GATE DRIVE AND PROTECTION LOGIC HS1 LS1 HS2 LS2 VSENSE ILIM PWM LS1 LS2 PGND CURRENT MIRROR AND CONSTANT OFF-TIME PWM CURRENT REGULATOR AGND PGND Figure 2. 33926 Simplified Internal Block...