MB91301 Datasheet | Fuji Electric

DESCRIPTION The MB91301 series are a line of microcontrollers based on a 32-bit RISC CPU core (FR family) , incorporating a variety of I/O resources and a bus control mechanism for embedded control that requires the processing of a high-performance, fast CPU as well as an SDRAM interface that can connect SDRAM directly to the chip. The large address space supported by the 32-bit CPU addressing means that operation is primarily based on external bus access although instruction cache memory of 4 Kbytes and RAM of 4 Kbytes( for data) are included for high-speed execution of CPU instructions. The MB91302A and MB91V301A are FR60 products based on the FR30/40 CPU with enhanced bus access for higher speed operation. The device specifications include a D/A converter to facilitate motor control and are ideal for use in DVD players that support fly-by transfer. - FEATURES The MB91301 series is a line of ICs with various programs embedded in internal ROM. ROM variation Product name Built-in the real Built-in IPL time OS version (Internal Program Loader) version User ROM version Without ROM version MB91302A (Continued) - PACKAGES 144-pin, Plastic LQFP 179-pin, Ceramic PGA (FPT-144P-M12) (PGA-179C-A03) .Data Sheet.in MB91301 Series 1. FR CPU - 32-bit RISC, load/store architecture, 5-stage pipeline - 68 MHz internal operating frequency (Max) [external (Max) 68 MHz] (when using PLL with base frequency (Max) = 17 MHz) - General purpose registers : 32 bits×16 - 16-bit fixed length instructions (basic instructions) , 1 instruction per cycle - Instruction set optimized for embedded applications: Memory-to-memory transfer, bit manipulation, barrel shift etc. - Instructions adapted for high-level languages : Function entry/exit instructions, multiple-register load/store instructions - Easier assembler coding : Register interlock function - Branch instructions with delay slots : Reduced overhead time in branch executions - Built-in multiplier with instruction-level support...