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MB91302A - (MB91301A / MB91302A) 32-Bit Proprietary Microcontroller

Download the MB91302A datasheet PDF. This datasheet also covers the MB91301A variant, as both devices belong to the same (mb91301a / mb91302a) 32-bit proprietary microcontroller family and are provided as variant models within a single manufacturer datasheet.

General Description

The MB91301 series are a line of microcontrollers based on a 32-bit RISC CPU core (FR family) , incorporating a variety of I/O resources and a bus control mechanism for embedded control that requires the processing of a high-performance, fast CPU as well as an SDRAM interface that can connect SDRAM

Key Features

  • S The MB91301 series is a line of ICs with various programs embedded in internal ROM. ROM variation Product name Built-in the real Built-in IPL time OS version (Internal Program Loader) version User ROM version Without ROM version MB91302A (Continued).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MB91301A_FujiElectric.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number MB91302A
Manufacturer Fuji Electric
File Size 1.39 MB
Description (MB91301A / MB91302A) 32-Bit Proprietary Microcontroller
Datasheet download datasheet MB91302A Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-16502-3E 32-Bit Proprietary Microcontroller CMOS FR60 MB91301 Series MB91302A/V301A ■ DESCRIPTION The MB91301 series are a line of microcontrollers based on a 32-bit RISC CPU core (FR family) , incorporating a variety of I/O resources and a bus control mechanism for embedded control that requires the processing of a high-performance, fast CPU as well as an SDRAM interface that can connect SDRAM directly to the chip. The large address space supported by the 32-bit CPU addressing means that operation is primarily based on external bus access although instruction cache memory of 4 Kbytes and RAM of 4 Kbytes( for data) are included for high-speed execution of CPU instructions.