MBM29DL161BE Datasheet | Fujitsu Semiconductor Limited

FEATURES Dual Operation - 0.23 µm Process Technology - Simultaneous Read/Write operations (dual bank) Multiple devices available with different bank sizes (Refer to Table 1) Host system can program or erase in one bank, then immediately and simultaneously read from the other bank Zero latency between read and write operations Read-while-erase Read-while-program - Single 3.0 V read, program, and erase Minimizes system level power requirements (Continued) s PRODUCT LINE UP Part No. VCC = 3.3 V Ordering Part No. VCC = 3.0 V Max. Address Access Time (ns) Max. CE Access Time (ns) Max. OE Access Time (ns) +0.3 V - 0.3 V +0.6 V - 0.3 V MBM29DL16XTE/BE 70 - 70 70 30 - 90 90 90 35 - 12 120 120 50 s PACKAGES 48-pin plastic TSOP (I) Marking Side 48-pin plastic TSOP (I) 48-pin plastic FBGA Marking Side (FPT-48P-M19) (FPT-48P-M20) (BGA-48P-M11) MBM29DL16XTE/BE-70/90/12 (Continued) - patible with JEDEC-standard mands Uses same software mands as E2PROMs - patible with JEDEC-standard world-wide pinouts 48-pin TSOP(I) (Package suffix: TN - Normal Bend Type, TR - Reversed Bend Type) 48-ball FBGA (Package suffix: PBT) - Minimum 100,000 program/erase cycles - High performance 70 ns maximum access time - Sector erase architecture Eight 4K word and thirty one 32K word sectors in word mode Eight 8K byte and thirty one 64K byte sectors in byte mode Any bination of sectors can be concurrently erased. Also supports full chip erase. - Boot Code Sector Architecture T = Top sector B = Bottom sector - Hidden ROM (Hi-ROM) region 64K byte of Hi-ROM, accessible through a new “Hi-ROM Enable” mand sequence Factory serialized and protected to provide a secure electronic serial number (ESN) - WP/ACC input pin At VIL, allows protection of boot sectors, regardless of sector protection/unprotection status At VIH, allows removal of boot sector protection At VACC, increases program performance - Embedded Erase TM- Algorithms Automatically pre-programs and erases the chip or any sector - Embedded...