MBM29DL400TC
FEATURES
- Single 3.0 V read, program, and erase Minimizes system level power requirements
- Simultaneous operations Read-while-Erase or Read-while-Program
- patible with JEDEC-standard mands Uses same software mands as E2PROMs
- patible with JEDEC-standard world-wide pinouts (Pin patible with MBM29LV400TC/BC) 48-pin TSOP(I) (Package suffix: PFTN
- Normal Bend Type, PFTR
- Reversed Bend Type)
- Minimum 100,000 program/erase cycles
- High performance 55 ns maximum access time
- Sector erase architecture Two 16K byte, four 8K bytes, two 32K byte, and six 64K bytes. Any bination of sectors can be concurrently erased. Also supports full chip erase.
- Boot Code Sector Architecture T = Top sector B = Bottom sector
- Embedded Erase TM Algorithms Automatically pre-programs and erases the chip or any sector
- Embedded Program TM Algorithms Automatically writes and verifies data at specified address
- Data Polling and Toggle Bit feature for detection of program or erase cycle pletion
- Ready/Busy...
