MBM29F002BC Datasheet PDF - Fujitsu Media Devices 2M (256K X 8) BIT Specs

MBM29F002BC - 2M (256K X 8) BIT

This page provides the datasheet information for the MBM29F002BC, a member of the MBM29F002TC 2M (256K X 8) BIT family.

Datasheet Summary

Description

The MBM29F002TC/BC is a 2 M-bit, 5.0 V-Only Flash memory organized as 256K bytes of 8 bits each.

The MBM29F002TC/BC is offered in a 32-pin TSOP(I) and 32-pin PLCC packages.

This device is designed to be programmed in-system with the standard system 5.0 V VCC supply.

Features

Single 5.0 V read, write, and erase Minimizes system level power requirements Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection 32-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type) 32-pin PLCC (Package Suffix: PD) Minimum 100,000 write/erase cycles High performance 55 ns maximum access time Sector erase architecture One 16K byte, two 8K bytes, one 32K byte, and.

Datasheet Details

Part number	MBM29F002BC
Manufacturer	Fujitsu Media Devices
File Size	461.15 KB
Description	2M (256K X 8) BIT
Datasheet	MBM29F002BC Datasheet
Additional preview pages of the MBM29F002BC datasheet.

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Full PDF Text Transcription

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FUJITSU SEMICONDUCTOR DATA SHEET DS05-20868-3E FLASH MEMORY CMOS 2M (256K × 8) BIT MBM29F002TC-55/-70/-90/MBM29F002BC-55/-70/-90 s FEATURES • • Single 5.0 V read, write, and erase Minimizes system level power requirements Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection 32-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type) 32-pin PLCC (Package Suffix: PD) Minimum 100,000 write/erase cycles High performance 55 ns maximum access time Sector erase architecture One 16K byte, two 8K bytes, one 32K byte, and three 64K bytes Any combination of sectors can be erased.

Published: Oct 2, 2005 |