MBM29F400TC Datasheet PDF - Fujitsu Media Devices 4M (512K X 8/256K X 16) BIT Specs

MBM29F400TC - 4M (512K X 8/256K X 16) BIT

This page provides the datasheet information for the MBM29F400TC, a member of the MBM29F400BC 4M (512K X 8/256K X 16) BIT family.

Datasheet Summary

Description

The MBM29F400TC/BC is a 4M-bit, 5.0 V-only Flash memory organized as 512K bytes of 8 bits each or 256K words of 16 bits each.

The MBM29F400TC/BC is offered in a 48-pin TSOP and 44-pin SOP packages.

This device is designed to be programmed in-system with the standard system 5.0 V VCC supply.

Features

Single 5.0 V read, write, and erase Minimizes system level power requirements.
Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP (Package suffix: PFTN.
Normal Bend Type, PFTR.
Reversed Bend Type) 44-pin SOP (Package suffix: PF).
Minimum 100,000 write/erase cycles.
High performance 55 ns maximum access time.
Sector erase architecture.

Datasheet Details

Part number	MBM29F400TC
Manufacturer	Fujitsu Media Devices
File Size	550.03 KB
Description	4M (512K X 8/256K X 16) BIT
Datasheet	MBM29F400TC Datasheet
Additional preview pages of the MBM29F400TC datasheet.

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Full PDF Text Transcription

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FUJITSU SEMICONDUCTOR DATA SHEET DS05-20851-4E FLASH MEMORY CMOS 4M (512K × 8/256K × 16) BIT MBM29F400TC-55/-70/-90/MBM29F400BC-55/-70/-90 s FEATURES • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts 48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 44-pin SOP (Package suffix: PF) • Minimum 100,000 write/erase cycles • High performance 55 ns maximum access time • Sector erase architecture One 16K byte, two 8K bytes, one 32K byte, and seven 64K bytes. Any combination of sectors can be concurrently erased. Also supports full chip erase.

Published: May 22, 2007 |