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MBM29LV004BC - 4M (512K x 8) BIT FLASH MEMORY

General Description

The MBM29LV004TC/BC are a 4M-bit, 3.0 V-only Flash memory organized as 512K bytes of 8 bits each.

The MBM29LV004TC/BC are offered in a 40-pin TSOP(I) and 40-pin SON packages.

These devices are designed to be programmed in-system with the standard system 3.0 V VCC supply.

Key Features

  • Single 3.0 V read, program, and erase Minimizes system level power requirements.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts 40-pin TSOP(I) (Package suffix: PTN.
  • Normal Bend Type, PTR.
  • Reversed Bend Type) 40-pin SON (Package suffix: PNS).
  • Minimum 100,000 program/erase cycles.
  • High performance 70 ns maximum access time.
  • Sector erase archite.

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📁 Similar Datasheet

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MBM29LV004BC-12 4M (512K x 8) BIT FLASH MEMORY Fujitsu
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MBM29LV004TC-12 4M (512K x 8) BIT FLASH MEMORY Fujitsu
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Other Datasheets by Fujitsu Semiconductor Limited

Part Number Description
MBM29LV004TC 4M (512K X 8) BIT
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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FUJITSU SEMICONDUCTOR DATA SHEET DS05-20864-3E FLASH MEMORY CMOS 4M (512K × 8) BIT MBM29LV004TC-70/-90/-12/MBM29LV004BC-70/-90/-12 s FEATURES • Single 3.0 V read, program, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts 40-pin TSOP(I) (Package suffix: PTN – Normal Bend Type, PTR – Reversed Bend Type) 40-pin SON (Package suffix: PNS) • Minimum 100,000 program/erase cycles • High performance 70 ns maximum access time • Sector erase architecture One 16K byte, two 8K bytes, one 32K byte, and seven 64K bytes Any combination of sectors can be concurrently erased.