MB8289 Datasheet | Fujitsu Semiconductor Limited

April 1990 Edition 2.0 DATA SHEET FUJITSU MB8289-251-35 CMOS 288K-BIT HIGH-SPEED SRAM 32K Words x 9 Bits Static Random Access Memory with Automatic Power pown The Fujitsu MB8289 is a 32,768 words x 9 bits static random access memory with parity generator and chacker, and fabricated with CMOS technology. To obtain a smaller chip size, the cell uses NMOS transistors and resistors. This device is housed in a 300 mil DIP package with low (605 m W max.) power dissipation. All pins are TIL patible and a single +5 V power supply is required. A separate chip select (CS) pin simplifies multipackage systems design by permitting the selection of an individual package when outputs are OR-tied, and then automatically powering down the other deselected packages. PLASTIC PACKAGE (DIP-32P-M02) .. The MB8289 oilers low power dissipation, low cost, and high performance. - Organization: 32,768 words x 9 bits - Static operation: no clocks or timing strobe required - Access time: I.AA - W:sl - 25 ns max, ~ - 14 ns max. (MB8289-25) I.AA - W:sl - 35 ns max, W:s2 - 15 ns max. (MB8289-35) - Low power consumption: 715 m W max. (Operating) for 25 ns 605 m W max. (Operating) for 35 ns 138 m W max. (TIL Standby) 83 m W max. (CMOS Standby) - ~ingle +5 V power supply ±1 0% Iolerance - TIL patible inputs and outputs - Thraa-state outputs with OR-tie capacity - Chip select for simplified memory expansion - Electrostatic protection for all inputs and outputs - Standard 32-pin Plastic P8ckages: Skinny DIP (300 mil) MB8289-xx PSK (450 mil) MB8289-xx PF Absolute Maximum Ratings (See Note) Rating Symbol Value Unn Supply...