• Part: MB85RS256A
  • Description: 256 K (32 K X 8) Bit SPI
  • Manufacturer: Fujitsu Semiconductor Limited
  • Size: 245.11 KB
MB85RS256A Datasheet (PDF) Download
Fujitsu Semiconductor Limited
MB85RS256A

Description

MB85RS256A is a FRAM (Ferroelectric Random Access Memory) chip in a configuration of 32,768 words × 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells.

Key Features

  • Pin Name Functional description Chip Select This is an input pin to make chips select
  • When CS is “H”, device is in deselect (standby) status as long as device is not write status internally, and SO bees High-Z
  • Other inputs from pins are ignored for this time
  • When CS is “L”, device is in select (active) status
  • CS has to be “L” before inputting op-code
  • Write Protect This is a pin to control writing to a status register
  • When WP is “L”, writing to a status register is not operated
  • Hold This pin is used to interrupt serial input/output without making chips deselect
  • When HOLD is “L”, hold operation is activated, SO bees High-Z, SCK and SI bee don’t care
  • While the hold operation, CS has to be retained “L”