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MB86978 - High Speed IPsec Processing Engine

Datasheet Summary

Description

MB86978 is IPsec accelerator engine of Inline Architecture.

Once setup with appropriate parameters, the device can perform bi-directional 100 Mbps IPsec processing at full wire speed.

Features

  • S.
  • Built-in RMII/MII interface of two ports One interface for WAN (internet) side and one for routing function side.
  • Complies with IEEE802.3 (DIX format).
  • Supports 10/100BASE-T/TX, full/half-duplex, and auto-negotiation.
  • IEEE 802.3x flow control supported.
  • Half-duplex back pressure supported.
  • SMI interface for PHY device control.

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Datasheet preview – MB86978

Datasheet Details

Part number MB86978
Manufacturer Fujitsu
File Size 430.59 KB
Description High Speed IPsec Processing Engine
Datasheet download datasheet MB86978 Datasheet
Additional preview pages of the MB86978 datasheet.

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Full PDF Text Transcription

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FUJITSU SEMICONDUCTOR DATA SHEET w . U 4 Engine t ASSP IPsec e e h S a t a D High-Speed IPsec Processing Engine . w w m o c DS04-22115-3E MB86978 ■ DESCRIPTION MB86978 is IPsec accelerator engine of Inline Architecture. Once setup with appropriate parameters, the device can perform bi-directional 100 Mbps IPsec processing at full wire speed. ■ FEATURES • Built-in RMII/MII interface of two ports One interface for WAN (internet) side and one for routing function side • Complies with IEEE802.3 (DIX format) • Supports 10/100BASE-T/TX, full/half-duplex, and auto-negotiation • IEEE 802.3x flow control supported • Half-duplex back pressure supported • SMI interface for PHY device control ■ PACKAGE 337-pin plastic FBGA w w w .D t a S a e h t e U 4 .
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