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MB86978A - High Speed IPsec Processing Engine

General Description

MB86978A is IPsec accelerator engine of Inline Architecture.

Once setup with appropriate parameters, the device can perform bi-directional 100 Mbps IPsec processing at full wire speed.

Key Features

  • S.
  • Built-in RMII/MII interface of two ports One interface for WAN (internet) side and one for routing function side.
  • Complies with IEEE802.3 (DIX format).
  • Supports 10/100BASE-T/TX, full/half-duplex, and auto-negotiation.
  • IEEE 802.3x flow control supported.
  • Half-duplex back pressure supported.
  • SMI interface for PHY device control.

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Other Datasheets by Fujitsu Semiconductor Limited

Part Number Description
MB86978 High Speed IPsec Processing Engine
MB86974 10/100M bps Ethernet Controller
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MB86976 xDSL WAN Ethernet Bridge Controller
MB86977 IP Packet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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FUJITSU SEMICONDUCTOR DATA SHEET w . U 4 Engine t ASSP IPsec e e h S a t a D High-Speed IPsec Processing Engine . w w m o c DS04-22115-4E MB86978A ■ DESCRIPTION MB86978A is IPsec accelerator engine of Inline Architecture. Once setup with appropriate parameters, the device can perform bi-directional 100 Mbps IPsec processing at full wire speed. ■ FEATURES • Built-in RMII/MII interface of two ports One interface for WAN (internet) side and one for routing function side • Complies with IEEE802.3 (DIX format) • Supports 10/100BASE-T/TX, full/half-duplex, and auto-negotiation • IEEE 802.3x flow control supported • Half-duplex back pressure supported • SMI interface for PHY device control ■ PACKAGE 337-pin plastic FBGA w w w .D t a S a e h t e U 4 .