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MBM29DL400BC-90 - 4M (512K x 8/256K x 16) BIT

Download the MBM29DL400BC-90 datasheet PDF. This datasheet also covers the MBM29DL400TC variant, as both devices belong to the same 4m (512k x 8/256k x 16) bit family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Single 3.0 V read, program, and erase Minimizes system level power requirements.
  • Simultaneous operations Read-while-Erase or Read-while-Program.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts (Pin compatible with MBM29LV400TC/BC) 48-pin TSOP(I) (Package suffix: PFTN.
  • Normal Bend Type, PFTR.
  • Reversed Bend Type).
  • Minimum 100,000 program/erase cycles.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MBM29DL400TC_FujitsuMediaDevices.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
MBM29DL400BC 4M (512K X 8/256K X 16) BIT Fujitsu Media Devices
MBM29DL400TC 4M (512K X 8/256K X 16) BIT Fujitsu Media Devices
MBM29DL161BD (MBM29DL16xTD/BD) FLASH MEMORY CMOS 16M (2M X 8/1M X 16) BIT Fujitsu Media Devices
MBM29DL161BE (MBM29DL16xTE/BE) 16M (2MX8/1MX16) BIT Dual Operation Fujitsu Media Devices
MBM29DL161TD (MBM29DL16xTD/BD) FLASH MEMORY CMOS 16M (2M X 8/1M X 16) BIT Fujitsu Media Devices

Other Datasheets by Fujitsu Semiconductor Limited

Part Number Description
MBM29DL400BC-12 4M (512K x 8/256K x 16) BIT
MBM29DL400BC-55 4M (512K x 8/256K x 16) BIT
MBM29DL400BC-70 4M (512K x 8/256K x 16) BIT
MBM29DL400TC-12 4M (512K x 8/256K x 16) BIT
MBM29DL400TC-55 4M (512K x 8/256K x 16) BIT

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FUJITSU SEMICONDUCTOR DATA SHEET DS05-20866-2E FLASH MEMORY CMOS 4M (512K × 8/256K × 16) BIT MBM29DL400TC-55/-70/-90/-12/MBM29DL400BC-55/-70/-90/-12 s FEATURES • Single 3.0 V read, program, and erase Minimizes system level power requirements • Simultaneous operations Read-while-Erase or Read-while-Program • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts (Pin compatible with MBM29LV400TC/BC) 48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) • Minimum 100,000 program/erase cycles • High performance 55 ns maximum access time • Sector erase architecture Two 16K byte, four 8K bytes, two 32K byte, and six 64K bytes. Any combination of sectors can be concurrently erased.