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GS81302R36E - 144Mb SigmaDDR-II Burst of 4 SRAM

Download the GS81302R36E datasheet PDF. This datasheet also covers the GS81302R08E-375 variant, as both devices belong to the same 144mb sigmaddr-ii burst of 4 sram family and are provided as variant models within a single manufacturer datasheet.

Description

Table Symbol Description Type Comments SA Synchronous Address Inputs Input R/W Synchronous Read/Write Input Read: Active High Write: Active Low BW0 BW3 Synchronous Byte Writes Input Active Low x18/x36 only NW0 NW1 Nybble Write Control Pin Input Active Low

Features

  • Simultaneous Read and Write SigmaDDR™ Interface.
  • Common I/O bus.
  • JEDEC-standard pinout and package.
  • Double Data Rate interface.
  • Byte Write (x36 and x18) and Nybble Write (x8) function.
  • Burst of 4 Read and Write.
  • 1.8 V +100/.
  • 100 mV core power supply.
  • 1.5 V or 1.8 V HSTL Interface.
  • Pipelined read operation with self-timed Late Write.
  • Fully coherent read and write pipelines.
  • ZQ pin for progra.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (GS81302R08E-375-GSITechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number GS81302R36E
Manufacturer GSI Technology
File Size 460.25 KB
Description 144Mb SigmaDDR-II Burst of 4 SRAM
Datasheet download datasheet GS81302R36E Datasheet

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Other Datasheets by GSI Technology

Part Number Description
GS81302R36GE 144Mb SigmaDDR-II Burst of 4 SRAM
GS81302R08E 144Mb SigmaDDR-II Burst of 4 SRAM
GS81302R08GE 144Mb SigmaDDR-II Burst of 4 SRAM
GS81302R09E 144Mb SigmaDDR-II Burst of 4 SRAM
GS81302R09GE 144Mb SigmaDDR-II Burst of 4 SRAM

Full PDF Text Transcription

Click to expand full text
GS81302R08/09/18/36E-375/350/333/300/250 165-Bump BGA Commercial Temp Industrial Temp 144Mb SigmaDDRTM-II Burst of 4 SRAM 375 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaDDR™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface • Byte Write (x36 and x18) and Nybble Write (x8) function • Burst of 4 Read and Write • 1.8 V +100/–100 mV core power supply • 1.5 V or 1.8 V HSTL Interface • Pipelined read operation with self-timed Late Write • Fully coherent read and write pipelines • ZQ pin for programmable output drive strength • IEEE 1149.
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