GS816118DT-xxxV Datasheet | GSI Technology

GS8161xx D(GT/D)-xxx V 100-Pin TQFP & 165-Bump BGA mercial Temp Industrial Temp 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 333 MHz- 150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Features - IEEE 1149.1 JTAG-patible Boundary Scan - 1.8 V or 2.5 V core power supply - 1.8 V or 2.5 V I/O supply - LBO pin for Linear or Interleaved Burst mode - Internal input resistors on mode pins allow floating mode pins - Byte Write (BW) and/or Global Write (GW) operation - Internal self-timed write cycle - Automatic power-down for portable applications - JEDEC-standard 165-bump BGA package - Ro HS-pliant 100-pin TQFP and 165-bump BGA packages available Functional Description Applications The GS8161xx D(GT/D)-xxx V is an 18,874,368-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM...