GS82032AT Description
Applications The GS82032A is a 2,097,152-bit high performance synchronous SRAM with a 2-bit burst address counter.
GS82032AT Key Features
- FT pin for user-configurable flow through or pipelined operation
- Single Cycle Deselect (SCD) operation
- 3.3 V +10%/-5% core power supply
- 2.5 V or 3.3 V I/O supply
- LBO pin for Linear or Interleaved Burst mode
- Internal input resistors on mode pins allow floating mode pins
- Default to Interleaved Pipelined mode
- Byte Write (BW) and/or Global Write (GW) operation
- mon data inputs and data outputs
- Clock Control, registered, address, data, and control