Description
The GS820E32A is a 2,097,152 bit high performance synchronous SRAM with a 2 bit burst address counter.
Features
- FT pin for user configurable flow through or pipelined operation.
- Dual Cycle Deselect (DCD) Operation.
- 3.3V +10%/-5% Core power supply.
- 2.5V or 3.3V I/O supply.
- LBO pin for linear or interleaved burst mode.
- Internal input resistors on mode pins allow floating mode pins.
- Default to Interleaved Pipelined Mode.
- Byte write (BW) and/or global write (GW) operation.
- Common data inputs and data outputs.
- Cl.
GS820E32A Datasheet
