GS82582T37GE Overview
Key Features
- 2.0 Clock Latency
- Simultaneous Read and Write SigmaDDR™ Interface
- Common I/O bus
- JEDEC-standard pinout and package
- Double Data Rate interface
- Burst of 2 Read and Write
- On-Die Termination (ODT) on Data (D), Byte Write (BW), and Clock (K, K) inputs
- 1.8 V +100/–100 mV core power supply
- 1.5 V or 1.8 V HSTL Interface
- Pipelined read operation with self-timed Late Write
