Datasheet Details
| Part number | GD16588 |
|---|---|
| Manufacturer | Giga |
| File Size | 216.71 KB |
| Description | (GD16584 / GD16588) Receiver / CDR and DeMUX |
| Datasheet |
 GD16588 Datasheet
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General Description
GD16584 and GD16588 are Receiver chips for use in STM-64/192 and Optical Transport Networking (OTN) systems.
The component is available in two versions: u GD16584 for 9.5328 Gbit/s.
u GD16588 for 10.66 Gbit/s for OTN or Forward Error Correction (FEC).
Key Features
- 500 ppm from the reference clock, it automatically switches the phase and frequency detector into the PLL loop. In the auto lock mode the locking range is selectable between 500 or 2000 ppm. When the VCO frequency is within the lock range, the Bang-Bang Phase Detector takes over. It controls the phase of the VCO until the sampling point of data is in the middle of the bit period, where the eye opening is largest. A ±40 mV Decision Threshold Control (DTC) is provided at the 10 Gbit/s input. The 1.