Overview: .. Technical Overview
CD4000B Series
This section is intended as a guide for circuit and equipment designers in the operation and application of MOS integrated circuits. It covers general operating and handling considerations with respect to the following critical factors: • • • • • • • • • Operating Supply Voltage Range Power Dissipation and Derating System Noise Considerations Power Source Rules Gate-oxide Protection Networks Input Signals and Ratings Chip Assembly and Storage Device Mounting Testing Dynamic power dissipation has three ponents: 1. The dissipation that results from current that charges and discharges the external load capacitance of the output buffers. The dissipation of each output buffer is equal to CV2f, where C is the load capacitance, V is the supply voltage, and f is the switching frequency of that output. 2. The dissipation that results from current that charges and discharges the internal node capacitances. 3. The dissipation caused by the current spikes through the PMOS and NMOS transistors in series at the instant of switching. This ponent amounts to approximately 10% of the total dissipation, shown graphically in the datasheets of most CMOS circuits. All CMOS devices are rated at 200mW per package at the maximum operating ambient temperature rating (TA) of 125oC for all packages. Power ratings for temperatures below the maximum operating temperature are shown in the standard CMOS thermal derating chart in Figure 1. This chart assumes that the device is mounted and soldered (or placed in a socket) on a PC board; there is natural convection cooling, with the PC board mounted horizontally; and the pressure is standard (14.7psia). In addition to the overall package dissipation, device dissipation per output transistor is limited to 100mW maximum over the full package operating temperature range.
