Part CD4096BMS
Description CMOS Gated J-K Master-Slave Flip-Flops
Manufacturer Intersil
Size 101.13 KB
Intersil

CD4096BMS Overview

Description

CD4095BMS and CD4096BMS are J-K Master-Slave FlipFlops featuring separate AND gating of multiple J and K inputs. The gated J-K inputs control transfer of information into the master section during clocked operation.

Key Features

  • Set-Reset Capability
  • High Voltage Types (20V Rating)
  • CD4095BMS Non-Inverting J and K Inputs
  • CD4096BMS Inverting and Non-Inverting J and K Inputs
  • 16MHz Toggle Rate (Typ.) at VDD
  • Gated Inputs
  • 100% Tested for Quiescent Current at 20V
  • 5V, 10V and 15V Parametric Ratings
  • Standardized Symmetrical Output Characteristics
  • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC