CD4095BMS Datasheet

Part: CD4095BMS
Description: CMOS Gated J-K Master-Slave Flip-Flops
Manufacturer: Intersil
Size: 101.13 KB

Intersil

CD4095BMS

Overview

CD4095BMS and CD4096BMS are J-K Master-Slave FlipFlops featuring separate AND gating of multiple J and K inputs. The gated J-K inputs control transfer of information into the master section during clocked operation.

Set-Reset Capability
High Voltage Types (20V Rating)
CD4095BMS Non-Inverting J and K Inputs
CD4096BMS Inverting and Non-Inverting J and K Inputs
16MHz Toggle Rate (Typ.) at VDD - VSS = 10V
Gated Inputs
100% Tested for Quiescent Current at 20V
5V, 10V and 15V Parametric Ratings
Standardized Symmetrical Output Characteristics
Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC

Datasheets by Manufacturer

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