HD74HC259 Description
The HD74HC259 has a single data input (D), 8 latch outputs (Q0-Q7), 3 address inputs (A, B, and C), a mon enable input (E), and a mon clear input. To operate this device as an addressable latch, data is held on the D input, and the address of the latch into which the data is to be entered is held on the A, B and C inputs. When enable is taken low the data flows through to the addressed output.
HD74HC259 Key Features
- High Speed Operation: tpd (Data to Output) = 16 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide O
- 0.5 1.35 1.8
- 0.5 1.5 3.15 4.2
- 1.9 4.4 5.9 4.13 5.63
- Output voltage
- 4.4 4.5
- 5.9 6.0
- Input current Quiescent supply current
- 95 19 16 10 pF ns n