HD74HC564P Datasheet | Hitachi Semiconductor

Description These devices are positive edge triggered flip-flops. The difference between HD74HC564 and HD74HC574 is only that the former has inverting outputs and the latter has noninvertering outputs. Data at the D inputs, meeting the set-up and hold time requirements, are transferred to the Q or Q outputs on positive going transitions of the clock (CK) input. when a high logic level is applied to the output cotrol (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Features - High Speed Operation: tpd (Clock to Output) = 13 ns typ (CL = 50 p F) - High Output Current: Fanout of 15 LSTTL Loads - Wide Operating Voltage: VCC = 2 to 6 V - Low Input Current: 1 µA max - Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Outputs Output Control Clock Data HD74HC564 HD74HD574 Q0 Q0 Q0 : level of Q before the indicated Steady-sate input conditions were established. Q0 : plement of Q0 or level of Q before the indicated Steady-state input Conditions were established. HD74HC564/HD74HC574 Pin Arrangement HD74HC564 Output Control 1 1D 2 2D 3 OE...