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HD74HC564P - Octal D-type Flip-Flop

Download the HD74HC564P datasheet PDF. This datasheet also covers the HD74HC564 variant, as both devices belong to the same octal d-type flip-flop family and are provided as variant models within a single manufacturer datasheet.

General Description

These devices are positive edge triggered flip-flops.

The difference between HD74HC564 and HD74HC574 is only that the former has inverting outputs and the latter has noninvertering outputs.

Key Features

  • High Speed Operation: tpd (Clock to Output) = 13 ns typ (CL = 50 pF).
  • High Output Current: Fanout of 15 LSTTL Loads.
  • Wide Operating Voltage: VCC = 2 to 6 V.
  • Low Input Current: 1 µA max.
  • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Outputs Output Control Clock Data HD74HC564 HD74HD574 L H L H L L H L L L H X X Q0 Q0 X Z Z Q0 : level of Q before the indicated Steady-sate input conditions were.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HD74HC564_HitachiSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
HD74HC564P Octal D-type Flip-Flops Renesas
HD74HC564 Octal D-type Flip-Flops Renesas
HD74HC563 Octal Transparent Latches Renesas
HD74HC51 AND-OR-INVERT Gate Renesas
HD74HC533 Octal D-type Transparent Latches Renesas

Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74HC564 Octal D-type Flip-Flop
HD74HC563 Octal Transparent Latches
HD74HC51 AND-OR-INVERT Gate
HD74HC533 Octal D-type Transparent Latches
HD74HC534 Octal D-type Flip-Flop

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74HC564/HD74HC574 Octal D-type Flip-Flops (with 3-state outputs) Description These devices are positive edge triggered flip-flops. The difference between HD74HC564 and HD74HC574 is only that the former has inverting outputs and the latter has noninvertering outputs. Data at the D inputs, meeting the set-up and hold time requirements, are transferred to the Q or Q outputs on positive going transitions of the clock (CK) input. when a high logic level is applied to the output cotrol (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.