HD74HC74 Description
The flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Each flip-flop has independent, J, K, clock, and clear inputs and Q and Q outputs. Clear is independent of the clock and acplished by a low level on the input.
HD74HC74 Key Features
- High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Opera
- 0.5 1.35 1.8
- 0.5 1.5 3.15 4.2
- 1.9 4.4 5.9 4.13 5.63
- Output voltage
- 4.4 4.5
- 5.9 6.0
- Input current Quiescent supply current
- 95 19 16 10 pF ns ns Clear to clock ns Clock to data ns Data to clock ns Clock, Clear Clear to Q or Q ns Clock to Q or Q
- 80 16 14