HD74HC76 Overview
Each flip-flop has independent J, K, preset, clear, and clock inputs and Q and Q outputs. This device is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and acplished by a low logic level on the corresponding input.
HD74HC76 Key Features
- High Speed Operation: tpd (Clock to Q) = 21 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Opera
- 0.5 1.35 1.8
- 0.5 1.5 3.15 4.2
- 1.9 4.4 5.9 4.13 5.63
- Output voltage
- 4.4 4.5
- 5.9 6.0
- Input current Quiescent supply current
- 95 19 16 10 pF ns ns Preset or Clear to Clock ns Clock to J or K ns J or K to Clock ns Preset, Clear, Clock Preset to Q
- 80 16 14
