HD74HCT237 - 3-to-8-line Decoder/Demultiplexer with Address Latch

Product Overview

Hitachi Semiconductor

Part number	HD74HCT237
Manufacturer	Hitachi Semiconductor
File Size	57.91 KB
Description	3-to-8-line Decoder/Demultiplexer with Address Latch
Datasheet	HD74HCT237 Datasheet
Additional preview pages of the HD74HCT237 datasheet.

The HD74HCT237 decodes a three-bit Address to one-of-eight active-high outputs.

LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A, B, C to Y) = 23 ns typ (C L = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) HD74HCT237 Function Table Inputs Enable GL X X L L L L L L L L H G1 X L H H H H H H H H H G2 H X L L L L L L L L.

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Other Datasheets by Hitachi Semiconductor

HD74HCT238 - 3-to-8-line Decoder/Demultiplexer
HD74HCT240 - Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs)
HD74HCT241 - Octal Buffers/Line Drivers/Line Receivers(with noninverted 3-state outputs)
HD74HCT242 - Quad. Bus Transceivers (with 3-state outputs)
HD74HCT243 - Quad. Bus Transceivers (with 3-state outputs)
HD74HCT244 - Octal Buffers/Line Drivers/Line Receivers(noninverted 3-state outputs)

Published: Mar 23, 2005 |