HD74HCT237 Description
The HD74HCT237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a transparent latch for storage of the Address. Two Chip Selects, one active-low and one active-high, are provided to facilitate the demultiplexing, cascading, and chip-selecting functions.
HD74HCT237 Key Features
- LSTTL Output Logic Level patibility as well as CMOS Output patibility High Speed Operation: tpd (A, B, C to Y) = 23 ns t
- 4.4 4.13
- Input current Quiescent supply current Iin I CC
- GL to Y G1 to Y G2 to Y A, B or C to Y
- 16 20 5
- 20 25 5
- 0.05 0°