HD74HCT237 Datasheet | Hitachi Semiconductor

3-to-8-line Decoder/Demultiplexer with Address Latch Description The HD74HCT237 decodes a three-bit Address to one-of-eight active-high outputs. The device has a transparent latch for storage of the Address. Two Chip Selects, one active-low and one active-high, are provided to facilitate the demultiplexing, cascading, and chip-selecting functions. The demultiplexing function is acplished by using the Address inputs to select the desired device output, and then by using one of the Chip Select as a data input while holding the other one active. The HD74HCT237 is the noninverting version of the HD74HCT137. Features - - - - - - LSTTL Output Logic Level patibility as well as...