HD74HCT240 Datasheet | Hitachi Semiconductor

Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs) Description The HD74HCT240 is an inverting buffer and has two active low enables (1 G and 2G ). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs. Features - - - - - - LSTTL Output Logic Level patibility as well as CMOS Output patibility High Speed Operation: tpd (A to Y) = 11 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs G H L L H L X Z : : : : A X H L High level Low level...