HD74HCT240 Description
The HD74HCT240 is an inverting buffer and has two active low enables (1 G and 2G ). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs.
HD74HCT240 Key Features
- LSTTL Output Logic Level patibility as well as CMOS Output patibility High Speed Operation: tpd (A to Y) = 11 ns typ (CL