Datasheet4U Logo Datasheet4U.com

HD74HCT245 - Octal Bus Transceivers (with 3-state outputs)

General Description

This device has an active low enable input G and a direction control input (DIR).

When DIR is high, data flows from the A inputs to the B outputs.

When DIR is low, data flows from the B inputs to the A outputs.

Key Features

  • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Enable G L L H H : L : X : High level Low level Irrelevant Direction Control DIR L H X Operation B data t.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
HD74HCT238 3-to-8-line Decoder/Demultiplexer Renesas
HD74HCT1G00 2-input NAND Gate Renesas Technology
HD74HCT1G08 2-input AND Gate Renesas Technology
HD74HCT1G32 High Speed CMOS two input OR gate Using Silicon Gate CMOS Process Renesas Technology
HD74HCT1G66 Analog Switch Renesas Technology

Other Datasheets by Hitachi Semiconductor (now Renesas)

Part Number Description
HD74HCT240 Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs)
HD74HCT241 Octal Buffers/Line Drivers/Line Receivers(with noninverted 3-state outputs)
HD74HCT242 Quad. Bus Transceivers (with 3-state outputs)
HD74HCT243 Quad. Bus Transceivers (with 3-state outputs)
HD74HCT244 Octal Buffers/Line Drivers/Line Receivers(noninverted 3-state outputs)

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74HCT245 Octal Bus Transceivers (with 3-state outputs) Description This device has an active low enable input G and a direction control input (DIR). When DIR is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from the B inputs to the A outputs. The HD74HCT245 transfers true data from one bus to the other. This device does not have schmitt trigger inputs. Features • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.