HD74HCT244 Description
The HD74HCT244 is a non-inverting buffer and has two active low enable (1G and 2G ). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs.
HD74HCT244 Key Features
- LSTTL Output Logic Level patibility as well as CMOS Output patibility High Speed Operation: tpd (A to Y) = 10 ns typ (CL