Hitachi HD74HC112
This device is edge sensitive to the clock input and change state on the negative going transition of the clock pulse.| Part No. | HD74HC112 |
|---|---|
| Datasheet | HD74HC112 Download |
| Manufacturer |  Hitachi |
| Description | Dual J-K Flip-Flops |
| Buy | Stock & Price |
DESCRIPTION
Each flip-flop has independent J, K, preset, clear and clock inputs and Q and Q outputs. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input.FEATURES
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● High Speed Operation: tpd (Clock to Q) = 17 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C) Function Table Inputs Preset L H L H H H H H H H Note: Clear H L L H H H H H H H L H Clock X X X J X X X L L H H X X X K X X X L H L H X X X Output Q H L H* 1 Q L H H*1 No Change L H Toggle No Change No Change No Change H L 1. Q and Q will remain HIGH as long as Preset and Clear are Low, but Q and Q are unpredictable, if Preset and Clear go HIGH simultaneously. HD74HC112 Pin Arrangement 1CK 1K 1J 1PR 1Q 1Q 2Q GND 1 2 3 4 5 6 7 8 (Top view) K CK J CLR PR Q Q J CK K PR CLR Q Q 16 Vcc 15 1CLR 14 2CLR 13 2CK 12 2K 11 2J 10...
