HD74HC390 Datasheet | Hitachi Semiconductor

Description The HD74HC390 incorporate dual decade counters, each posed of a divide-by-two and a divide-byfive counter. The divide-by-two and divide-by-five counters can be cascaded to form dual decade, dual biquinary, or various binations up to a single divide-by-100 counter. The HD74HC390 is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set high all four bits of each counter are set to a low level. This enables count truncation and allows the implementation of divide-by-N counter configurations. Features - - - - - High Speed Operation: tpd (Clock A to QA) = 11 ns typ (CL = 50 p F) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Clock A X B X X X Clear H L L Operation Clear ÷2 and ÷5 Increment ÷2 Increment ÷5 Pin Arrangement 1A 1Clear 1QA Output 1B 1QB Outputs 1QC 1QD GND 1 2 3 4 5 6 7 8 (Top view) CLR 1QA 1A 1B 1QB CLR 2QA 2A 2B 2QB 2QC 16 VCC 15 2A 14 2Clear 13 2QA Output 12 2B 11 2QB 10 2QC 9 2QD Outputs 1QC 1QD 2QD Block Diagram (1/2) Clear A CK D Q CK R Q A B CK D Q CK R Q B CK D Q CK R Q C CK D Q CK R Q D DC Characteristics Ta = 25°C Item Input voltage Symbol VIH Ta = - 40 to +85°C Max - - - 0.5 1.35 1.8 - - - - - 0.1 0.1 0.1 0.33 0.33 ±1.0 40 µA µA I OL = 4 m A I OL = 5.2 m A Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA V I OH = - 4 m A I OH = - 5.2 m A Vin = VIH or VIL I OL = 20 µA V Vin = VIH or VIL I OH = - 20 µA V Unit V Test Conditions VCC (V) Min Typ Max Min 2.0 4.5 6.0 1.5 - 3.15 - 4.2 - - - - - -...