HD74HCT74A
HD74HCT74A is Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset manufactured by Hitachi Semiconductor.
Description
The HD74HCT74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin package. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset and clear are independent of the clock and acplished by a low level at the appropriate input.
Features
- VCC = 4.5 to 5.5 V operation
- Input terminal has protection diode
Function Table
Inputs PRE L H L H H H CLR H L L H H H CLK X X X ↑ ↑ L D X X X H L X Outputs Q H L H H L Q0
- 1
- 1 L H Q0
H : High level L : Low level X : Immaterial ↑ : Low to high transition Q0 : Level to Q before the indicated steady state input conditions were established. Note : 1. Q and Q will remain high as long as preset and clear are low, but Q and Q are unpredictable, if preset and clear go high simultaneously.
Pin Arrangement
1CLR 1 1D 2 1CLK 3 1PRE 4 1Q 5 1Q 6 GND 7
14 VCC 13 2CLR 12 2D 11 2CLK 10 2PRE 9 2Q 8 2Q
(Top view)
Absolute Maximum Ratings
Item Supply voltage Input diode peak current Output diode peak current Output current VCC, GND current / pin Storage temperature Symbol VCC I IK I OK IO I CC or IGND Tstg Ratings
- 0.5 to 7.0 ±20 ±20 ±25 ±50
- 65 to 150 Unit V m A m A m A m A °C
Remended Operating Conditions
Item Supply voltage Input voltage Symbol VCC VIH VIL VI Output voltage Output current VO I OH I OL Input rise / fall time Operating temperature t r, t f Ta Min 4.5 2.0 0 0 0
- -
- - 40 Typ 5.0
- -
- -
- 4 4
- - Max 5.5
- 0.8 VCC VCC
- - 500 85 ns °C V m A Unit V V
Logic Diagram
PRE CLK C C C Q
TG C C C
TG Q
C...
