HD74LVC74 Datasheet | Hitachi Semiconductor

Description The HD74LVC74 has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin package. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset and clear are independent of the clock and acplished by a low level at the appropriate input. Low voltage and high speed operation is suitable at the battery drive product (note type personal puter) and low power consumption extends the life of a battery for long time operation. Features - - - - - VCC = 2.0 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±24 m A (@VCC = 3.0 V to 5.5 V) Function Table Inputs PR L H L H H H H H H: L: X: ↓: ↑: Q0: Note: CLR H L L H H H H H CK X X X ↑ ↑ L H ↓ D X X X H L X X X Outputs Q H L H H L Q0 Q0 Q0 - 1 - 1 L H Q0 Q0 Q0 High level Low level Immaterial High to Low transition Low to high transition Level to Q before the indicated steady input conditions were established. 1. Q and Q will remain high as long as preset and clear are low, but Q and Q are unpredictable, if preset and clear go high simultaneously. Pin Arrangement 1CLR CK D PR CLR 14 VCC 13 2CLR 1D 2 1CK 3 12 2D 11 2CK 1PR 4 1Q 5 1Q 6 GND 7 D CK 10 2PR 9 2Q 8 2Q CLR PR Q Q (Top view) Absolute Maximum Ratings Item Supply voltage Input diode current Input voltage Output diode current Symbol VCC I IK VI I OK Ratings - 0.5 to 6.0 - 50 - 0.5 to 6.0 - 50 50 Output voltage Output current VCC, GND current / pin Storage temperature VO IO I CC or IGND Tstg ±50 100 - 65 to +150 Unit V m A V m A m A VO = - 0.5 V VO = VCC +0.5 V VI = - 0.5 V Conditions - 0.5 to VCC +0.5 V m A m A °C Note: The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Remended...