HI-6120 Datasheet | Holt Integrated Circuits

DESCRIPTION The HI-6120 and HI-6121 provide a plete, integrated, 3.3V MIL-STD-1553 Remote Terminal in a monolithic silicon gate CMOS device. Two host interface options are offered: The HI-6120 uses a 16-bit parallel host bus interface for access to registers and RAM and is offered in a 100-pin plastic quad flat pack (PQFP). The HI-6121 has a 4-wire SPI (Serial Peripheral Interface) host connection and es in a reduced pin count 52-pin PQFP or 9mm x 9mm 64-pin QFN. Both devices handle all aspects of the MIL-STD-1553 protocol, including message encoding, decoding, error detection, illegal mand detection and data buffering. Host data management is simplified by storing message information and data within the onchip 32K x 16 static RAM. A descriptor table in shared RAM provides fully programmable memory management. Multiple descriptor tables can be implemented for fast context switching. Transmit and receive mands can use any of four different data buffer modes: indexed (single)...