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H57V2582GTR-60I - 256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O

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Hynix Semiconductor

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H57V2582GTR-60I 256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O by Hynix Semiconductor - Datasheet Preview — Datasheet preview – H57V2582GTR-60I

Datasheet Details

Part number	H57V2582GTR-60I
Manufacturer	Hynix Semiconductor
File Size	227.17 KB
Description	256Mb Synchronous DRAM based on 8M x 4Bank x8 I/O
Datasheet	H57V2582GTR-60I Datasheet
Additional preview pages of the H57V2582GTR-60I datasheet.

H57V2582GTR-60I Product details

Description

and is subject to change without notice.

Hynix does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

Standard SDRAM Protocol Internal 4bank operation Power Supply Voltage : VDD = 3.3V, VDDQ = 3.3V All device pins are compatible with LVTTL interface Low Voltage interface to reduce I/O power 8,192 Refresh cycles / 64ms Programmable CAS latency of 2 or 3 Programmable Burst Length and Burst Type - 1, 2, 4, 8 or full page for Sequential Burst - 1, 2, 4 or 8 for Interleave Burst.
-40oC ~ 85oC Operation Package Type : 54_Pin TSOPII This pr.

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Published: Oct 11, 2014 |