H5DU6462CTR Key Features
- VDD, VDDQ = 2.3V min ~ 2.7V max (Typical 2.5V Operation +/- 0.2V for DDR266, 333 and 400) All inputs and outputs are pat
- data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per ea
- of the clock
- ORDERING INFORMATION
- FA -E3 -E4
- X means speed gra