H5TC2G83EFR-PBA Overview
The H5TC2G43EFR-xxA and H5TC2G83EFR-xxA are a 2Gb low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density, high bandwidth and low power operation at 1.35V. DDR3L SDRAM provides backward patibility with the 1.5V DDR3 based environment without any changes. (Please refer to the SPD information for details.) SK hynix 2Gb DDR3L SDRAMs...
H5TC2G83EFR-PBA Key Features
- VDD=VDDQ=1.35V + 0.100 /
- 0.067V
- Fully differential clock inputs (CK, CK) operation
- Differential Data Strobe (DQS, DQS)
- Average Refresh Cycle (Tcase of0 oC~95oC)
- 7.8 µs at 0oC ~ 85 oC
- 3.9 µs at 85oC ~ 95 oC
- On chip DLL align DQ, DQS and DQS transition with CK
- transition
- DM masks write data-in at the both rising and falling edges of the data strobe