H5TC2G83EFR-RDA SK Hynix Datasheet

H5TC2G83EFR-RDA Key Features

• VDD=VDDQ=1.35V + 0.100 /
• 0.067V
• Fully differential clock inputs (CK, CK) operation
• Differential Data Strobe (DQS, DQS)
• Average Refresh Cycle (Tcase of0 oC~95oC)
• 7.8 µs at 0oC ~ 85 oC
• 3.9 µs at 85oC ~ 95 oC
• On chip DLL align DQ, DQS and DQS transition with CK 
• transition
• DM masks write data-in at the both rising and falling  edges of the data strobe