Datasheet Details
| Part number | HC2510C |
|---|---|
| Manufacturer | Hynix Semiconductor |
| File Size | 81.20 KB |
| Description | Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications |
| Datasheet |
 HC2510C Datasheet
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| Part number | HC2510C |
|---|---|
| Manufacturer | Hynix Semiconductor |
| File Size | 81.20 KB |
| Description | Phase-Locked Loop Clock Distribution for Synchronous DRAM Applications |
| Datasheet |
HC2510C Datasheet
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The HC2510C is a low-skew, low jitter, phaselocked loop(PLL) clock driver, distributing high frequency clock signals for SDRAM.The HC2510C operates at 3.3V Vcc and provides integrated series-damping resistors that make it ideal for driving point-to-point loads.The propagation delay from the CLK input to any clock output is nearly zero.Ten outputs provide low-skew and low-jitter clocks.All outputs can be enabled or disabled via the control input(G).Output signal duty cycles are adjusted to 5
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