HY29F040A Key Features
- 5.0 V ± 10% Read, Program, and Erase
- Minimizes system-level power requirements
- High performance
- 55 ns access time
- patible with JEDEC-Standard mands
- Uses software mands, pinouts, and packages following industry standards for single power supply Flash memory
- Minimum 100,000 Program/Erase Cycles
- Sector Erase Architecture
- Eight equal size sectors of 64K bytes each
- Any bination of sectors can be erased concurrently; also supports full chip erase