HY51V65163HG
DESCRIPTION
This familiy is a 64Mbit dynamic RAM organized 4,194,304 x 16bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The advanced circuit and process allow this device to achieve high performance and low power dissipation. Features are access time(45ns or 50ns) and refresh cycle(4K ref ) and power consumption (Normal or low power with self refresh). Advanced CMOS process as well as circuit techniques for wide operating margins allow this device to achieve high speed access and high reliability
FEATURES
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- Extended data out operation Read-modify-write capability Multi-bit parallel test capability LVTTL(3.3V) patible inputs and outputs /RAS only, CAS-before-/RAS, Hidden and self refresh(L-version) capability
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- JEDEC standard pinout 50pin plastic SOJ/TSOP-II(400mil) Single power supply of 3.3V +/- 10% Battery back up operation(L-version)
- Fast access time and cycle time
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